Performs an SIMD computation of the square roots of the four packed single-precision floatingpoint values in the source operand (second operand) stores the packed single-precision floatingpoint results in the destination operand. The source operand can be an XMM register or a 128- bit memory location. The destination operand is an XMM register. See Figure 10-5 in the IA-32 Intel Architecture Software Developer's Manual, Volume 1 for an illustration of an SIMD single-precision floating-point operation.
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