Performs an SIMD signed multiply of the packed signed word integers in the destination operand (first operand) and the source operand (second operand), and stores the low 16 bits of each intermediate 32-bit result in the destination operand. (Figure 4-3 shows this operation when using 64-bit operands.) The source operand can be an MMX technology register or a 64-bit memory location, or it can be an XMM register or a 128-bit memory location. The destination operand can be an MMX technology register or an XMM register.

if(OperandSize == 64) {
	//PMULLW instruction with 64-bit operands:
	//Signed multiplication
	Temporary0[0..31] = Destination[0..15] * Source[0..15];
	Temporary1[0..31] = Destination[16..31] * Source[16..31];
	Temporary2[0..31] = Destination[32..47] * Source[32..47];
	Temporary3[0..31] = Destination[48..63] * Source[48..63];
	Destination[0..15] = Temporary0[0..15];
	Destination[16..31] = Temporary1[0..15];
	Destination[32..47] = Temporary2[0..15];
	Destination[48..63] = Temporary3[0..15];
}
else {
	//PMULLW instruction with 64-bit operands:
	//Signed multiplication
	Temporary0[0..31] = Destination[0..15] * Source[0..15];
	Temporary1[0..31] = Destination[16..31] * Source[16..31];
	Temporary2[0..31] = Destination[32..47] * Source[32..47];
	Temporary3[0..31] = Destination[48..63] * Source[48..63];
	Temporary4[0..31] = Destination[64..79] * Source[64..79];
	Temporary5[0..31] = Destination[80..95] * Source[80..95];
	Temporary6[0..31] = Destination[96..111] * Source[96..111];
	Temporary7[0..31] = Destination[112..127] * Source[112..127];
	Destination[0..15] = Temporary0[0..15];
	Destination[16..31] = Temporary1[0..15];
	Destination[32..47] = Temporary2[0..15];
	Destination[48..63] = Temporary3[0..15];
	Destination[64..79] = Temporary4[0..15];
	Destination[80..95] = Temporary5[0..15];
	Destination[96..111] = Temporary6[0..15];
	Destination[112..127] = Temporary7[0..15];
}

None.